The objective of any electronics package is to protect sensitive integrated circuits from harsh environments without inhibiting electrical performance. The package is used to electrically and mechanically attach a chip to an intended device. One popular family of electronics package is the Micro Leadframe Packaging (MLP) also known as Quad-Flat-No-Lead (QFN) or Dual-Flat-No-Lead (DFN). MLP is based upon a patterned and etched metal mounting commonly with a central pad, onto which a single or multiple semiconductor chips or dies are mounted, connected with wirebonds to isolated package pins, then encapsulated in a plastic sealing material. The sealing material is applied around the metal of the mounting and the integrated circuit with wirebonds to form a hard, protective plastic body.
Further information relative to mounting technology may be found in Chapter 8 of the book Micro Electronics Packaging Handbook, (1989), edited by R. Tummala and E. Rymaszewski, incorporated by reference herein. This book is published by Van Nostrand Reinhold, 115 Fifth Avenue, New York, N.Y.
Generally, manufacture is completed using an array of multiple MLP mountings. After encapsulation a mounting is separated from any supporting peripheral mounting structures and neighbouring packages by a punch or a saw.
It may be stated generally that there is a desire in the electronics packaging industry to reduce size and cost whilst at the same time as integrating more functionality. One proven route to increase functionality is to include several integrated circuits in the same MLP. Modern assembly techniques allow dies to be stacked or flip mounted (i.e. mounted in an inverted orientation) known as “flip-chip” mounting, ensuring a minimal final package size.
There are additional problems to be solved in the electronics packaging industry. One such problem is that many types of integrated circuit produce high levels of unwanted thermal energy, even when in normal operation. These circuits still require integration. Thermal design is also important and a method of dissipating heat to maintain electrical and mechanical stability has been sought.
Another such problem is that many electronics products need to operate in an electrically noisy environment. A method of protecting a sensitive integrated circuit within the package from unwanted electrical interference has also been sought.
A further such problem is that many electronics products require direct electrical connection to the system ground potential to obtain optimum performance. If this connection is electrically impaired (e.g. by resistive or inductive impairment) many integrated circuits particularly operating at intermediate and high frequencies or with high electrical currents may be adversely affected. A method of providing a low resistance, low inductance path to system ground has been sought.